Fakultät für informatik informatik 12 technische universität dortmund Memory architecture...

fakultät für informatikinformatik 12

technische universität dortmund

Memory architecturedescription languages

- Session 20 -

Peter MarwedelTU DortmundInformatik 12

Germany

- 2 -technische universitätdortmund

fakultät für informatik

p. marwedel, informatik 12, 2008

TU Dortmund

Schedule of the course

Time Monday Tuesday Wednesday Thursday Friday

09:30-11:00

1: Orientation, introduction

2: Models of computation + specs


9: Mapping of applications to platforms

13: Memory aware compilation


11:00 Brief break Brief break Brief break Brief break

11:15-12:30

6: Lab*: Ptolemy

10: Lab*: Scheduling

14: Lab*: Mem. opt.

18: Lab*: Mem. opt.

12:30 Lunch Lunch Lunch Lunch Lunch

14:00-15:20



11: High-level optimizations*


19: WCET & compilers*

15:20 Break Break Break Break Break

15:40-17:00

4: Lab*: Kahn process networks


12: High-level optimizations*


20: Wrap-up

* Dr. Heiko Falk




TU Dortmund

Memory hierarchy description languages:ArchC

Consists of description of ISA and HW architectureExtension of SystemC (can be generated from ArchC):

Storage class structure

[P. Viana, E. Barros, S. Rigo, R. Azevedo, G. Araújo:Exploring Memory Hierarchy with ArchC, 15th Symposium on Computer Architecture and High Performance Computing, 2003, pp. 2 – 9]




TU Dortmund

Example: Description of a simplecache-based architecture




TU Dortmund

Memory Aware Compilation and Simulation Framework (for C) MACC

[M. Verma, L. Wehmeyer, R. Pyka, P. Marwedel, L. Benini: Compilation and Simulation Tool Chain for Memory Aware Energy Optimizations, Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS VI), 2006].

Application C code

Source-level memory optimizer

encc, ARM gcc, M5 DSP

Array partitioningSPM overlay

Executable binaryEnergy databaseMemory hierarchy description

Compilation Framework

Profile report

Memory simulator

Processor simulators (ARM7/M5)

Profiler

Simulation Framework

MPSoC simulator




TU Dortmund

Memory architecture description @ MACCv2

Query can include address, time stamp, value, … Query can request energy, delay, stored values Query processed along a chain of HW components, incl. busses, ports,

address translations etc., each adding delay & energy

[R. Pyka et al.: Versatile System level Memory Description Approach for embedded MPSoCs, University of Dortmund, Informatik 12, 2007]

API query to model simplifies integration into compiler

External XML representation

REQEnergy= ?

Cycles= ?

+10 Energy

+5 Cycles

+1 Energy

+2 Cycles

+1 Energy

+0 Cycles

CPU1 MM

ASPC-1- IFETCH- DRD- DWR- MAINAS

ASPC-M- 0…ffff

ASPC-B- 0 … 3ffff




TU Dortmund

Controlling tool chain generation through an architecture description language (ADL): EXPRESSION

Overall information flow

[P. Mishra, A. Shrivastava, N. Dutt: Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs, ACM Trans. Des. Autom. Electron. Syst. (TODAES), 2006, pp. 626-658]




TU Dortmund

Description of Memories in EXPRESSION

Generic approach, based on the analysis of a wide range of systems;

Used for verification.

(STORAGE_SECTION(DataL1

(TYPE DCACHE) (WORDSIZE 64)(LINESIZE 8) (NUM_LINES 1024)(ASSOCIATIVITY 2) (READ_LATENCY 1) ...(REPLACEMENT_POLICY LRU)(WRITE_POLICY WRITE_BACK)

)(ScratchPad

(TYPE SRAM) (ADDRESS_RANGE 0 4095) ….)(SB

(TYPE STREAM_BUFFER) …..(InstL1

(TYPE ICACHE) ………)(L2

(TYPE DCACHE) …….)(MainMemory

(TYPE DRAM))(Connect

(TYPE CONNECTIVITY)(CONNECTIONS

(InstL1, L2) (DataL1, SB) (SB, L2)(L2, MainMemory)

)))




TU Dortmund

EXPRESSION: results

q




TU Dortmund

Optimization for main memoryExploiting burst mode of DRAM (1)

[P. Grun, N. Dutt, A. Nicolau: Memory aware compilation through accurate timing extraction, DAC, 2000, pp. 316 – 321]

Supported trafos: memory mapping, code reordering or loop unrolling




TU Dortmund

Optimization for main memoryExploiting burst mode of DRAM (2)

Timing extracted from EXPRESSION model

for(i=0; i<9;i+=3){a=a+x[i]+x[i+1]+x[i+2]+ y[i]+y[i+1]+y[i+2];b=b+z[i]+z[i+1]+z[i+2]+ u[i]+u[i+1]+u[i+2];}

Open circles of original paper changed into closed circles (column decodes).




TU Dortmund

New Books

Lars Wehmeyer, Peter Marwedel: Fast, Efficient and Predictable Memory Accesses, Springer, 2006

Manish Verma, Peter Marwedel: Advanced Memory Optimization Techniques for Low-Power Embedded Processors, Springer, May 2007




TU Dortmund

Additional References (1)

D. Page: Effective Use of Partitioned Cache Memories, PhD Thesis, Department of Computer Science, University of Bristol, UK 2001.

O. S. Unsal et al. Cool-Cache: A Compiler-Enabled Energy Efficient Data Caching Framework for Embedded/ Multimedia Processors, ACM Transactions on Embedded Computing Systems, Vol. 2, 2003

J. Kin et al.: The Filter Cache: An Energy Efficient Memory Structure, 30th Annual International Symposium on Microarchitecture (MICRO), 1997.

L. H. Lee et al. Instruction Fetch Energy Reduction Using Loop Caches For Embedded Applications with small Tight Loops, International Symposium on Low Power Electronics and Design (ISLPED), 1999.

S. C. A. Gordon-Ross, F. Vahid: Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example, Computer Architecture Letters, 1, 2002.

S. Steinke: Untersuchung des Energieeinsparungspotenzials in eingebetteten Systemen durch energieoptimierende Compilertechnik (in German), PhD Thesis, University of Dortmund, Germany, 2003.




TU Dortmund


P. R. Panda, N. Dutt, A. Nicolau: Memory Issues in Embedded Systems-On-Chip, Kluwer Academic Publishers, Norwell, MA, 1999.

S. Steinke et al.: Assigning Program and Data Objects to Scratchpad for Energy Reduction, Design Automation and Test in Europe Conference (DATE’02), 2002.

L. Wehmeyer, P. Marwedel: Influence of On-chip Scratchpad Memories on WCET, 4th International Workshop on Worst-Case Execution Time Analysis, (WCET), 2004

L. Wehmeyer, P. Marwedel: Influence of Memory Hierarchies on Predictability for Time Constrained Embedded Software, Design Automation and Test in Europe Conference (DATE’05), 2005

L. Wehmeyer, U. Helmig, P. Marwedel: Compiler-optimized Usage of Partitioned Memories, 3rd Workshop on Memory Performance Issues (WMPI), 2004.

F. Angiolini, L. Benini, A. Caprara: Polynomial-Time Algorithm for On-Chip Scratchpad Memory Partitioning, International Conference on Compilers, Architecture and Synthesis of Embedded Systems (CASES’03), 2003




TU Dortmund


J. Chame Shin, M. W. Hall: A Compiler Algorithm for Exploiting Page-Mode Memory Accesses in Embedded-DRAM Devices, Workshop on Media and Stream Processors, 2002

M. Verma, P. Marwedel: Overlay of Scratchpad Memory for Low Power Embedded Processors, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol.14, 2006.

E. Brockmeyer et al.: Layer Assignment Techniques for Low Energy in Multi-Layered Memory Organisations, Design, Automation and Test in Europe Conference (DATE), 2003.

M. Verma, K. Petzold, L. Wehmeyer, H. Falk, P. Marwedel: Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach, IEEE 3rd Workshop on Embedded Real-Time Multimedia (ESTIMedia), 2005.

L. Wehmeyer, P. Marwedel: Fast, Efficient and Predictable Memory Accesses Optimization Algorithms for Memory Architecture Aware Compilation, Springer, 2006

M. Verma, Peter Marwedel: Advanced Memory Optimization Techniques for Low-Power Embedded Processors, Springer, 2007

Credit goes to all students involved in the design of SPM tools at Dortmund, in particular to Stefan Steinke, Robert Pyka, Manish Verma and Lars Wehmeyer.

Credit goes to all students involved in the design of SPM tools at Dortmund, in particular to Stefan Steinke, Robert Pyka, Manish Verma and Lars Wehmeyer.




TU Dortmund

(Intermediate) Summary

Memory architecture description languages

• Enable memory architecture-dependent optimizations

• ArchC

• MACC

• EXPRESSION

• Demonstration of optimization with EXPRESSION

• No common approach yet




TU Dortmund

Questions?

Q&A?

fakultät für informatikinformatik 12

technische universität dortmund

Embedded System Education

Peter MarwedelTU DortmundInformatik 12

Germany




TU Dortmund

Frequent view

SBC1685 StackableUSB™ Celeron®/ Pentium® III Computer with Gigabit Ethernet

Industry’s first StackableUSB™ host Celeron®/Pentium® III computer Gigabit Ethernet 4 USB 2.0 High speed ports, 4 USB 1.1 ports Two serial ports CompactFlash PCI-104 expansion

Embedded system = small computer, programming with memory maps and interrupts, possibly in assemblyExample:

Very much based on PC technology,does not consider modeling problems, …

http://www.embeddedsys.com/subpages/products/sbc1685.shtml




TU Dortmund

Sources on ES education in general

ACM curriculum: ES missing. Sangiovanni-V.: “.. today's educational systems are not providing the appropriate foundations for embedded systems”)

P. Caspi et al.: Guidelines for a graduate curriculum on embedded software and systems, ACM Transactions on Embedded Computing Systems (TECS), p. 587-611, 2005

M. Grimheden, M. Törngren: What Is Embedded Systems and How Should It Be Taught?—Results from a Didactic Analysis, ACM Transactions on Embedded Computing Systems, 2005, p. 633–651

A. Sangiovanni-Vincentelli, A. Pinto: Embedded system education: a new paradigm for engineering schools? ACM SIGBED Rev., 2005

ALARI, www.alari.ch Embedded Systems Institute, www.esi.nl




TU Dortmund

Sources on ES education in general (2)

S.-l. Tsao, T.Y. Huang, C.-T. King: The Development and Deployment of Embedded Software Curricula in Taiwan, ACM SIGBED Review, 2007, p. 64-72

I. McLoughlin, D. Maskell, S. Thambipillai, W.-B. Goh: An Embedded Systems graduate education for Singapore, International Conference on Parallel and Distributed Systems, 2007, p. 1-5

1st Asia-Pacific Workshop on Embedded System Education and Research (APESER 2007), http://brass.cs.nctu.edu.tw/APESER2007

WESE’08: WS on Embedded Systems Education, http://www.artist-embedded.org/artist/WESE-08.html




TU Dortmund

Concept of ES education at Dortmund (bachelor)

Term Courses Content

1 Computer structures Boolean algebra, computer arithmetic, MIPS assembly language, RT structures

2 Introduction to EE and communication theory

Electrical networks, microcontrollers, wireless communication

3 Hardware lab RT structures, mindstorms ®, microcontrollers

4

5 Embedded system fundamentals

Specs, hardware, RTOS, scheduling, mapping, optimizations

6 Embedded system design lab + Bachelor thesis

For example, FPGA programming+ various thesis topics




TU Dortmund

Structure of the CS curriculum at Dortmund- 3 year bachelor program -

Term

1 Computer structures Programming & semantics

Math education

2 Circuits & communication

OS Algorithms

3 HW lab Networks SW lab

4 Databases …

5 Embedded systems fundamentals

Software engineering

…

6 Embedded system design lab + Thesis

… …All dependences met




TU Dortmund

Structure of the CS curriculum at Dortmund- 4.5 year diploma program -

Term

1 Computer organization

Programming & semantics

Math education

2 Circuits & communication

OS Algorithms

3 HW lab Networks SW lab

4 Databases …

5 Embedded systems fundamentals

Software engineering

…

6 Advanced topic in ES

… …

7 Project group … …

8 … …

9 Thesis

All dependences met




TU Dortmund

Consistent with Taiwanese

Curricula for Technical

Universities

http://portal.acm.org/ citation.cfm?id=1217817




TU Dortmund

Content of ES book

Introduction Models of computation and specifications

• FSM-based models, computational graphs• von Neumann computation, discrete event systems

Embedded System Hardware• A/D- and D/A-converters• Processing

Embedded Operating Systems and Standard Software• RT-OS

HW/SW-Codesign• Mapping of Applications to Platforms• Evaluation, Optimization

VerificationNext edition scheduled for 2009




TU Dortmund

Dependencies for ES course

Can typically be taught in 4th or 5th term Provides motivation and context of other work in the area Mix of students and courses from CS and EE departments

Can typically be taught in 4th or 5th term Provides motivation and context of other work in the area Mix of students and courses from CS and EE departments

programmingprogramming algorithmsalgorithms computerorganization

computerorganization

matheducation

matheducation

electrical networks& digital circuits

electrical networks& digital circuits

first courseon embedded systemsfirst courseon embedded systems

lablab

controlsystems

controlsystems

DSPDSP machine vision

machine vision

real-timesystems

real-timesystems

project group

project group

applicationsapplications …

Lego




TU Dortmund

Broad scope avoids problems with narrow perspectivesreported in ARTIST curriculum guidelines

“The lack of maturity of the domain results in a large variety of industrial practices, often due to cultural habits”

“curricula … concentrate on one technique and do not present a sufficiently wide perspective.”

“As a result, industry has difficulty finding adequately trained engineers, fully aware of design choices.”

Source: P. Caspi, Guidelines…., (see above), 2005Source: P. Caspi, Guidelines…., (see above), 2005




TU Dortmund

Scope consistent with ARTIST guidelines

"The development of ES cannot ignore the underlying HW characteristics. Timing, memory usage, power consumption, and physical failures are important."

"It seems that fundamental bases are really difficult to acquire during continuous training if they haven’t been initially learned, and we must focus on them."

dtP




TU Dortmund

Summary

Memory architecture description languages

• Enable memory architecture-dependent optimizations

• EXPRESSION, ArchC, MACC

• No common approach yet Embedded system education

• No ES education at all or focus on programming small computer systems still wide-spread

• More general approach required

• Approaches from Dortmund and Taiwan demonstrate how education can be organized;limited “headroom” in standard CS curriculum




TU Dortmund

Trained?

Q&A?




TU Dortmund

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