FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Prototyping SolutionsFor New Wireless Standards
Christoph JuchemsIAF – Institute For Applied Radio System Technology
Berliner Str. 52 JD-38104 Braunschweig
Germany
www.iaf-bs.de
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
•Institute for applied Radio System Technology•Located in Braunschweig / Germany•founded 1992•15 employees
Introduction IAF
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
1992 Company foundation
1993 IFA Berlin – Präsentation ‚Digital terrestrial video broadcasting technique‘ (DVB-T)
1995 IFA Berlin – Demonstration of mobile DVB-T Receiption
1995 Technology-Transfer Award of chamber of industry and commerce Braunschweig
1997 Development of Prototypes for ATM-Mobile 5,2 GHz wireless radio transmission
1999 Development of a wireless voting system (433 MHz)
2001 Conception and Development of a Wireless LAN OFDM testbed for the 5,2 GHz band
2003 Conception and Development of a 'Wideband OFDM testbed' for the 70 GHz band
2004 1 GBit/s wireless transmission with a MiMo OFDM System
2006 Conception and Development of a 3GLTE testbed
2008 3GLTE advanced features / standard compliant test and measurement solutions
IAF History –building prototypes for new wireless standards
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
•Development of digital and analog hardware components
•Development and implementation of baseband signal processing
•OFDM (Orthogonal Frequency Division Multiplex) systems
•SCFDE ( Single Carrier with Frequency Domain Equalization) systems
•Time and Frequency Synchronisation
•Digital Filtering and modulation
•FEC Encoding and Decoding
•Implementation of high rate application interfaces ( 1 GBit Ethernet , PCIx)
Experiences
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Conception and development of innovative radio transmission systems•System conception and feasibility studies
•System simulation
•Hardware development and PCB design
•Software development
•Design, implementation and verification of signal processing algorithms
•Algorithm implementation in HDL
•System integration, verification and test
•Manufacturing real-time prototyping systems
•Engineering support for series production
Product line: universal FPGA Building Set
Fields of Work
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Two different FPGA based prototyping platforms are available:
• FFP Basic ( equipped with Xilinx Virtex-IIpro FPGA)
• FFP Basic+ ( equipped with Xilinx Virtex-5 FPGA)
Hardware extensions are available for both types of prototyping platforms:
• Pluggable add-on modules for several applications ( DAC, ADC, Gbit Ethernet, DSP)
• Development of customer-specific add-on modules
FPGA Building Set
Well-approved prototyping platform FFP Basic
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
• FPGA mainboard equipped with four Xilinx Virtex-5 FPGA, integrated board controller FPGA,
power supply, clock management and several user interfaces
• six extension slots for pluggable add-on modules ( DAC, ADC, DSP)
New Prototyping Platform FFP Basic+
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Virtex 5 LX330T Virtex 5 LX330T
Virtex 5 SX95T
Virtex 4 FX60
Ext. Slot 1 Ext. Slot 2 Ext. Slot 4 Ext. Slot 5
160
Backplane Connector 1
160
100
Backplane Connector 2
100
1GB EthUSBMMC Card
-
QDR RAMQDR RAM
1GB Eth 1GB EthUSB Front Connector 2
Front Connector 1
36 36Flash DDR
Board Configuration Extension SlotsUser FPGA User Memory User InterfacesNotes:
PLL
32
134
Virtex 5 SX95T
160 160
134
7632
Ext. Slot 3
160
Ext. Slot 6
160
CONF (to all devices)
PCI GTP
2 Lanes2 Lanes
2 Lanes 2 Lanes
2 Lanes
2 Lanes
2 Lanes2 Lanes
PCI PCI
2 Lanes 2 Lanes
HIL(to all devices)
2 Lanes 2 Lanes
290CLK (to all devices)
FFP Basic Plus Architecture
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
FFP Basic +Prototyping Platform
PC
PCIexpressInterface
PCIexpressInterface
PCIe-Connection
CPRI ( optical)Via SFP
connector
Remote Radio Head
CPRI ( optical)Via SFP
connector
CPRI-connection
RF Frontend
Digital IQ
ADC / DAC
CPRI ( optical)Via SFP
connector
CPRI-connection
LVDSinterface
CPRI
LVDSconnection
LVDSPCIe
PCIe-Connection
Add-on module:3 GSPS ADC /
DAC
Add-on module:Digital Signal
Processor
Gbit EthernetInterface
USBInterface
Gbit Eth
USB
Add-on module:200 MSPS ADC / DAC
RF FrontendRF Frontend
Capabilities of the FFP Basic Building Set
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
DSP 1
CPLD 1
Power-Supply / Conversion5V - 3,3V5V - 2,5V5V - 1,8V5V - 1,1V
I2C-PROM
Rx/Tx-Data2-N/P
Rx/Tx-Data1-N/PSRIO
Ser/Des
1x SRIO4 MMCX
4 Leds
JTAG Con CPLD
Dip-Switch
LED Control
DSP-Boot-Configuration
CPLD JTAG Programming
DSP JTAG ProgrammingJTAG Con DSP
OsziClock2
Diff.
Single TMS32C6474 System
1x SRIO4 MMCX
Mux
OsziClock1
Diff.
6 AIF24 MMCX
Framesync 7 MMCX
Ethernet 4MMCX
128 Mbyte DDR2
Faraday DSP Add-on Module Rev.1/ Rev. 2
Additional Features of Rev. 2:
-128 MB DDR2 Memory
-All 6 AIF interfaces on MMCX connectors, can be connecteddirectly to Rocket I/O
-Ethernet interface on MMCX connectors, additional adaptorwith Ethernet connectorrequired
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
DSP Board ExtensionDSP Board MainFFP Basic Plus
DSP 1
CPLD 1
V4 Control
V5
Power-Supply /
Conversion5V - 3,3V5V - 2,5V5V - 1,8V5V - 1,1V
I2C-PROM
Rx/Tx-Data2-N/P
Rx/Tx-Data1-N/PSRIO
Ser/Des
1x SRIO4 MMCX
I²C-Bus
16bit RXBus 16bit TXBus + Control
DSP 2
I2C-PROM
Rx/Tx-Data2-N/P1x SRIO4 MMCX
I²C-Bus
Rx/Tx-Data2-N/P
I2C-PROM
I²C-Bus
I²C-Bus I²C-Board ID
4 Leds
JTAG Con CPLD
Dip-Switch
Reset,B
oot-Konfig,G
PIO Interface (Leds)
LED Control
DSP-Boot-Configuration
CPLD JTAG Programming
DSP JTAG ProgrammingJTAG Con DSP
CPLD 2
8 Leds
JTAG Con CPLD
Dip-Switch
LED Control
DSP-Boot-Configuration
CPLD JTAG Programming
DSP JTAG ProgrammingJTAG Con DSP
Reset ...
Power-Supplyfrom Main-
Board3,3V 2,5V 1,8V 1,1V
OsziClock2
Diff.
TMS32C6474 DSP-Board system concept
Communication DSP-CPLD-CPLD
DSP 2
Reset,Boot-K
onfig,GP
IO Interface(Leds)
Rx/Tx-D
ata1-N/P
DSP 3
Clock 1
Clock 2
1x SRIO4 MMCX
Mux
OsziClock1
Diff.
6 AIF24 MMCX
Framesync 7 MMCX
128 Mbyte DDR2
Ethernet 4MMCX
6 AIF24 MMCX
Framesync 7 MMCX
Ethernet 4MMCX
Clock 1
128 Mbyte DDR2
Clock 2
1x SRIO4 MMCX
128 Mbyte DDR2
6 AIF24 MMCX
Framesync 7 MMCX
Ethernet 4MMCX
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Testbed Configuration: 2 x 2 MIMO / OFDMA / Multi-User
OFDM Subcarrier
ModulationAntenna1
Base-station
Terminal 1
Terminal 2
OFDM Subtcarrier
ModulationAntenna 1
OFDM Subtcarrier
ModulationAntenna 2
OFDM Subtcarrier
ModulationAntenna 2
CQI
CQ
I
FRUCT, 2009-04-29
Insti tut für angewandteFunksystemtechnik GmbH
Thank You
Top Related