MIL/SIL/PIL Approach A new paradigm in Model Based · PDF fileA new paradigm in Model Based...

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Bitte decken Sie die schraffierte Fläche mit einem Bild ab. Please cover the shaded area with a picture. (24,4 x 11,0 cm) MIL/SIL/PIL Approach A new paradigm in Model Based Development www.continental-corporation.com Powertrain Division Narayanamurthy Srinivas, Narendrakumar Panditi Stefan Schmidt, Ralf Garrelfs

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Page 1: MIL/SIL/PIL Approach A new paradigm in Model Based  · PDF fileA new paradigm in Model Based Development ... SIL also allows to verify the code coverage. ... 7/8/2014 12:49:46 PM

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MIL/SIL/PIL Approach A new paradigm in Model Based Development

www.continental-corporation.com Powertrain Division

Narayanamurthy Srinivas, Narendrakumar Panditi

Stefan Schmidt, Ralf Garrelfs

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Agenda

8 July 2014

2Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG

Motivation - Model Based Development (MBD) 1

Model verified by Simulation (MvS)2

3 Case study on MIL/SIL/PIL

4

5

6

MIL/SIL/PIL Simulation results in SDA

Comparison of MIL/SIL/PIL results

Conclusion

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Manual Model In the Loop (MIL) Model In the Loop (MIL)

Software In the Loop (SIL)

Processor In the Loop (PIL)

Specification

Design

Manual in the form of

document

Model design using MBD

MIL: Model verification

Model design using MBD

MIL: Model verification

Coding Manual coding Auto code generation

(ACG)

Auto code generation (ACG)

Code

Verification

Manual prepared test

cases to perform Unit

Testing

Tool generated test cases

to perform unit testing

Reuse MIL test cases

SIL : Software verification

PIL : Software verification on

Target processor or

equivalent instruction set

simulator

Motivation - Model Based Development (MBD)

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Model Based Development: V- Cycle

8 July 2014

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SOFTWARE

FLP : Floating point model

FXP : Fixed point model

MvS : Model verified by Simulation

SIL : Software In the Loop

PIL : Processor In the Loop

HIL : Hardware In the Loop

TVG : Test Vector Generation

SYSTEMRequire-

ments

Implemen-

tation

Model

(FXP)

Physical

Model

(FLP)

Automatic Code

Generation

SIL

PIL

Module

Test

Validation

HIL

Car

Integration

Test

HIL

MvS

TVG

MvS

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Model Verified by Simulation (MvS)

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Physical

model(FLP)

Implementation

Model(FXP)

C-Code(s-function in model)

C-Code(compiled for

µC- Target)

=

Result

=

Result

Result

Result

ACG

MILModel

In the Loop

SIL Software

In the Loop

PIL Processor

In the Loop

Scaling

Functional

RequirementsExpected

Values

Test

cases

≈Modeling

Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG

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MIL

Model In the Loop

SIL

Software In the Loop

PIL

Processor In the Loop

Refers to the kind of testing done

to verify the accuracy /

acceptability of a plant model or

a control system.

MIL testing means that the

model and its environment are

simulated in the modeling

framework without any physical

hardware components.

Refers to the kind of testing done

to validate the behavior of the

auto generated code used in the

controller.

The embedded software

is tested within a simulated

environment model but

without any hardware.

Refers to the kind of testing done

to validate the referenced model

by generating production code

using the model reference target.

The code is cross-compiled for

and executed on a target

processor or an equivalent

instruction set simulator.

MIL allows testing at early

stages of the development cycle.

SIL also allows to verify the code

coverage.

PIL level of testing can reveal

faults that are caused by the

target compiler or by the

processor architecture.

Definition – MIL/SIL/PIL

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Case study on Engine Temperature function

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Test suite for calculation of load information for coolant temperature model1

Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG

<LOAD_TCO_MDL>

100%

V.6.5

V.7.3

V.7.2

m

u

R

x_in

x_out

IV = 0

V.7.1

C_MAF_KGH_MAX_LOAD_TCO

V.6.4

C_CRLC_LOAD_TCO_MDL

V.6.4

<LOAD_TCO_MDL>

<LV_ES>

<MAF_KGH>

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Model In the Loop (MIL): Floating point model

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Stimuli/InputsController/Module

LevelDisplay/Verify

Simulation

project

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||

||

||

FLP

STIMULI

MAF_KGH

V.5.8

LV_ES

V.5.8

LOAD_TCO_MDL

V.5.8

<MAF_KGH>

<LV_ES>

<LOAD_TCO_MDL>

ENTE_SIGCVTCOAIX

DISPLAY

FLP

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Model In the Loop (MIL): Fixed point model

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Stimuli/InputsController/Module

LevelDisplay/Verify

Simulation

project

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FXP

STIMULI

MAF_KGH

V.5.8

LV_ES

V.5.8

LOAD_TCO_MDL

V.5.8

<MAF_KGH>

<LV_ES>

<LOAD_TCO_MDL>

ENTE_SIGCVTCOAIX

DISPLAY

FXP

||

||

||

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MvS: SDA Simulation Manager

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Deviations can be detected

and can be solved at early

stages

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Comparison results MIL - FLP/FXP (Error)

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Deviations due to

wrong scaling

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Comparison results - FLP/FXP (Corrected Case)

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Deviations are with in

the resolution

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Present Situation after MIL

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Random test cases are generated to test production code.

Execute generated test cases in the project environment.

1

2

4

3 More effort is required to prepare test cases to verify production code.

Completely different test cases are used to verify model and generated code.

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1Wouldn’t it be nice to reuse the MIL test cases for test of the Automatically

Generated Code ?

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Software in the Loop: SIL

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Stimuli/Inputs Sfunction block Display/Verify

Simulation

project

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||

||

||

STIMULI

V.5.8

LOAD_TCO_MDL

V.5.8

MAF_KGH

LV_ES

LOAD_TCO_MDL

ENTE_SIGCVTCOAI

SimMode:SIL

DISPLAY

MAF_KGH

V.5.8

LV_ES

SIL SIL

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Comparison results - MIL/SIL (wrong case)

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Comparison results - MIL/SIL (correct case)

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No Deviation

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Processor In the Loop: PIL

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Stimuli/Inputs Sfunction block Display/Verify

Simulation

project

Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG

STIMULI

LOAD_TCO_MDL

V.5.8

MAF_KGH

LV_ES

LOAD_TCO_MDL

ENTE_SIGCVTCOAI

SimMode:SIL

DISPLAY

MAF_KGH

V.5.8

LV_ES

V.5.8

||

||

||

PIL PIL

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Comparison results - SIL/PIL

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PIL results for different target processors - Reusability

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No Deviations

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Conclusion

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Necessary test effort can be essentially minimized across simulations.1

Tests suites are portable and reusable.2

3Cost-efficient consistent testing for all phases of the development:

One test suite for all development phases (MIL, SIL, PIL).

4

5

6

Early malfunction detection.

Eases the updating of test suites for changed requirements.

Shorter development process resulting in significant time-to-market advantage.

Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG

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for your attention!Thank you

8 July 2014

22Narayanamurthy S, Narendrakumar P, Stefan Schmidt & Ralf Garrelfs © Continental AG